Episode 30: Architectural verification and deadlocks
Formal bytes: The Axiomise Podcast Channel

Episode 30: Architectural verification and deadlocks

2020-10-13

In this podcast, Dr. Darbari discusses architectural formal verification and deadlocks in processors. Deadlocks can cause all sorts of issues in the design and though you may believe that reset would be a great way of bringing the chip out of the deadlock, your customers may not want to always reboot the device. Use Axiomise formalISA to find & fix deadlocks and if you like prove that they have been fixed.

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